Many applications in modern electronics require that continuous-time signals be converted to discrete signals for processing using digital computers and signal processors. Typically, this transformation is made using a conventional analog-to-digital converter (ADC). In general, conventional ADCs convert signals occupying a narrow frequency spectrum (i.e., narrowband signals) with relatively high precision (i.e., resolution), and convert signals occupying a wide frequency spectrum (i.e., wideband signals) with relatively moderate precision. However, the present inventor has discovered that existing ADC approaches exhibit shortcomings that limit overall performance, particularly in multi-mode applications where a single ADC is used to convert either narrowband signals with relatively high precision or wideband signals with relatively moderate precision.
A multi-mode data converter is defined herein as one having high input bandwidth, and a means of being configured such that any continuous-time, continuously-variable input signal falling within that input bandwidth, can be converted with an effective resolution (i.e., number of effective bits) that is inversely related to the actual bandwidth of the signal. Therefore, a multi-mode converter transforms narrowband continuous-time signals (e.g., high-fidelity audio) to discrete-time signals with higher precision than wideband signals (e.g., high-speed data communications). Due to parallel processing and other innovations, the digital information processing bandwidth of computers and signal processors has advanced beyond the capabilities of state-of-the art, multi-mode ADCs. Multi-mode converters with higher input bandwidth and improved resolution are desirable in certain circumstances, and existing solutions are limited by input bandwidth, effective conversion resolution, or both.
The resolution of an ADC is a measure of the precision with which a continuous-time continuously variable signal can be transformed into a quantized signal, and typically is specified in units of effective bits (B). When a continuous-time continuously variable signal is converted into a discrete-time discretely variable signal through sampling and quantization, the quality of the signal degrades because the conversion process introduces quantization, or rounding, noise. High-resolution converters introduce less quantization noise because they transform continuously variable signals into discrete signals using a rounding operation with finer granularity. Instantaneous conversion bandwidth is limited by the Nyquist criterion to a theoretical maximum of one-half the converter sample rate (the Nyquist limit). High-resolution conversion (of ≧10 bits) conventionally has been limited to instantaneous bandwidths of about a few gigahertz (GHz) or less.
FIGS. 1A&B illustrate block diagrams of conventional, multi-mode data converters 3A&B, respectively. A multi-mode converter generally consists of a core analog-to-digital converter 5A or 5B, a digital filter 6A or an analog filter 6B, and a digital function 7A for signal downsampling (e.g., decimation) or an analog function 7B for signal downconversion.
The circuit 3A illustrated in FIG. 1A employs an oversampling approach consisting of: 1) a moderate resolution ADC 5A with high instantaneous bandwidth (i.e., effective sample rate), 2) a digital finite impulse response (FIR) filter 6A, and 3) a programmable digital decimator 7A. The core quantizing element 5A samples and digitizes continuous-time, continuously variable signals at a fixed sample rate fS that is twice the input bandwidth of the converter, such that for narrowband input signals, the sample rate fS is significantly higher than twice the bandwidth fB of the input signal (i.e., fS>>fB), and for a wideband input signal, the sample rate fS is only marginally higher than half the signal bandwidth fB (i.e., fS≈2·fB). The purpose of digital FIR filter 6A is to attenuate quantization noise that is outside the input signal bandwidth fB and improve effective converter resolution by an amount ΔB equal to
            Δ      ⁢                          ⁢      B        =                            1          6                ·        10        ·                              log            10                    ⁡                      (                                          1                2                            ·                                                f                  s                                                  N                  B                                                      )                              ⁢                          ⁢      bits        ,where NB is the equivalent noise bandwidth of the digital filter 6A. According to the above equation, which assumes an output noise spectral density that is white (i.e., spectrally flat), the conversion resolution of the multi-mode converter shown in FIG. 5A improves by approximately 0.5 bits for every 50% reduction in conversion bandwidth (i.e., 0.5 bits/octave). The optional decimator 7A reduces the data rate at the converter output to twice the input signal bandwidth (fB), or greater.
A conventional alternative to the oversampling approach shown in FIG. 1A is the circuit 3B illustrated FIG. 1B. The multi-mode converter circuit 3B shown in FIG. 1B uses a Nyquist-rate, or baud-sampled, approach consisting of: 1) an analog downconverter 7B, 2) a tunable, analog (anti-aliasing) low-pass filter 6B, and 3) an ADC 5B with a programmable sample rate fS. The core quantizing element 5B samples and digitizes continuous-time, continuously variable input signals at a sample rate fS that is equal to, or slightly higher than, twice the bandwidth fB of the input signal (i.e., fS≧2·fB). The analog downconverter 7A translates the analog input signal from an intermediate frequency (IF) to baseband, so that the ADC 5B can operate with a sample rate fS that is at or near the Nyquist limit (i.e., fS≈2·fB). The analog low-pass filter 6B is “tuned” to a bandwidth that is one-half the ADC 5B sample frequency fS to prevent aliasing. The noise bandwidth N′B of ADC 5B is equal to one-half the sample rate fS, and since the ADC 5B output noise power is proportional to its noise bandwidth (i.e., assuming a white output noise spectral density), lowering the ADC 5B sample frequency fS improves conversion resolution by
                    Δ        ⁢                                  ⁢        B            ≥                                    1            6                    ·          10          ·                                    log              10                        ⁡                          (                              Δ                ⁢                                                                  ⁢                                  f                  s                                            )                                      ⁢                                  ⁢        bits              ,          or      ⁢                          ⁢      equivalently                  Δ      ⁢                          ⁢      B        ≥                            1          6                ·        10        ·                              log            10                    ⁡                      (                          Δ              ⁢                                                          ⁢                              N                B                ′                                      )                              ⁢                          ⁢              bits        .            In the above equations, ΔfS is the ratio of initial (i.e., reference) sample rate to final sample rate, and ΔN′B is the ratio of initial (i.e., reference) ADC noise bandwidth to final ADC noise bandwidth. The “≧” operator in the above equation reflects the tendency of ADC performance to improve with lower sample rates, such as for example, due to longer settling periods that reduce transient errors. According to the above equations, therefore, the conversion resolution of the multi-mode converter, shown in FIG. 5B, improves by 0.5 bits for every 50% reduction in conversion bandwidth (i.e., 0.5 bits/octave), plus an additional amount that depends on the extent to which the precision of the core ADC 5B improves at lower sample rates fS. This additional benefit from lower sample rates fS is realized at the expense of more complicated analog circuitry that includes a tunable analog filter 6B, an analog downconverter 7B, a programmable local oscillator (LO) synthesizer 4A, and a programmable ADC clock source 4B.
The core oversampling/wideband and Nyquist-rate ADCs 5A&B used in prior-art multi-mode converters 3A&B, shown in FIG. 1A&B, respectively, include those based on conventional flash and conventional pipelined ADC architectures. Conventional flash converters potentially can achieve very high instantaneous (input) bandwidths. However, the resolution of flash converters can be limited by practical implementation impairments that introduce quantization errors, such as sampling jitter, thermal noise, and rounding/gain inaccuracies caused by component tolerances. Although flash converters potentially could realize high resolution at instantaneous bandwidths greater than 10 GHz, this potential has been unrealized in commercial offerings. Conventional pipeline converters generally have better resolution than conventional flash converters, because they employ complex calibration schemes to reduce the quantization/rounding errors caused by these practical implementation impairments. However, pipeline converters typically can provide less than about 1 GHz of instantaneous bandwidth.
Furthermore, for conventional multi-mode ADCs, the resolution performance improvement of 0.5 bits per octave (i.e., factor of two) reduction in conversion bandwidth is generally realized only to the extent that the ADC output noise spectral density is white. The resolution performance of ADCs that operate at high sample rates, however, tends to be limited by sampling jitter, which is highly colored and narrowband. Possibly due to the performance limitation imposed by practical implementation impairments, such as sampling jitter, conventional multi-mode converters have not been demonstrated with high-resolution at bandwidths greater than a few GHz.
An adaptation to the conventional oversampling multi-mode ADC approach illustrated in FIG. 1A incorporates low-pass, discrete-time (DT) noise-shaping. Circuit 3C shown in FIG. 2 uses a conventional, low-pass delta-sigma (ΔΣ) modulator 5C (made up of sample-and-hold circuit 8, subtractor 9, hard limiter 10 and integrator 11A) as the core quantizing element; and employs a low-pass filter consisting of integration 12A, decimation 7C, and differentiation 12B functions. As the name implies, a delta-sigma modulator 5C shapes the noise introduced by coarse quantizer 10 by performing a difference operation 9 (i.e., delta) and an integration operation 11A (i.e., sigma), e.g.,
      I    ⁡          (      z      )        =            1              1        -                  z                      -            1                                .  The result, illustrated in FIG. 2B for first order noise shaping, is a signal transfer function (STF) response 30 that is all-pass and a quantization noise transfer function (NTF) response 32 that is high-pass. This unequal processing of signal and quantization noise allows low-frequency, narrowband signals to be converted with higher resolution than wideband signals, because the narrowband low-pass filter 6C can attenuate more quantization noise due to the noise-shaped response. Compared to multi-mode converters without noise shaping (e.g., converter 3A shown in FIG. 1A), however, this noise-shaped response does not improve conversion resolution of wideband input signals, and degrades conversion resolution of high-frequency, narrowband input signals. Also, the present inventor has discovered that the sampling jitter sensitivity of discrete-time, noise-shaped converters generally is not better than that of oversampled converters without noise shaping, due to use of explicit (e.g., sample-and-hold function 8) or implicit (e.g., switched-capacitor integrators) sampling functions that are not subjected to the noise-shaped response.
In multi-mode applications, noise-shaped converters can offer very high resolution, but the low-pass filtering operation required to attenuate shaped quantization noise at high frequency generally limits the utility of noise-shaped converters to applications requiring only low input bandwidth. Multi-mode converters without noise shaping can realize wide input bandwidth, but their resolution performance is generally limited by practical implementation impairments such as sampling jitter, thermal noise, and rounding/gain inaccuracies. Therefore, the need exists for a multi-mode ADC technology that is cable of wide bandwidth, with resolution performance that is not limited by these practical implementation impairments.